The spec can include or not include specific elements that allow timing probes of various sorts. It’s more economic if the specified tests are decisive or if the failure of additional hidden tests of a similar nature would be unarguable as violation of a general contract clause, coupled with the other tests, etc.

There might be tests that have no pratical use other than thwarting hacks.

Good feedback on this.

Scratch on some other places where GT can drive chip design…

a) Develop peer reviewed theory & algorithms for microcode & speculative execution, especially with extra concurrency

b) Data mine for patterns of instruction sequences that show up a lot in optimized code – candidates for hardware implementation with a theory that says why, at least empirically.

c) Try to downshift highly compatible existing low power designs to extra low power variations. Think of a bidirectional search between ideal low power usage & good compatiblity and see where they meet and how it could be tool supported. Due this also in the wireless radio space.

d) For streching mfg. design, keep stretching search for “clean box” rather than clean room & automated manufacture of the clean boxes.