This topic contains 14 replies, has 1 voice, and was last updated by 
josh November 17, 2020 at 3:02 pm.
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joshThe simulation environment should be setup to evaluate provisional designs with respect to a variety of test conditions & overall goodness metrics. It may turn out that some good designs require a backward compatibility mode to work with current system OS & provide extra benefits with an OS that is informed about how to optimize their usage.
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joshSNIA PCIe SSD 101 is a helpful reference for current design trends in SSD hardware & interfaces.
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joshIntuitively – the OS/firmware/design should manage –
writes go to fastest cache memory first, & then get shifted to their long term location
reads that are frequent and/or chunked should be striped in the manner of multi-raid
infrequent/stale data can be powered down until needed
might be some extra gain in smart prediction – hard to say, depending on other factors – some sequences of reads will be common.
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joshI’m imagining that most of the work on lock-free algorithms for work queues can be mapped to designs that are not corrupted by sudden power loss.
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joshprior to 2008
https://www.linkedin.com/in/peter-sangiorgio-6b416949/ -
joshprior to 2008
https://www.linkedin.com/in/devin-pennington-752ab0b3/ -
joshprior to 2020
https://www.linkedin.com/in/sneha-s-jain/ -
joshprior to 2016
https://www.linkedin.com/in/rohanjotwani/ -
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joshprior to 2020
Below the top of the stack, there was a replacement for a complaining witness to replacement who was treated badly in error environment. Unknown results.
https://www.linkedin.com/in/courtney-scanlon-md-mba-23641216/ -
joshA long series of victims
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