Unified Language For Mixed Digital/Analog Circuit Design Specs

Forums Personal Topics Unbidden Thoughts Unified Language For Mixed Digital/Analog Circuit Design Specs

This topic contains 5 replies, has 1 voice, and was last updated by  josh January 27, 2021 at 3:13 pm.

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  • #80461

    josh

    It seems that there are widely used systems for computationally describing digital & analog behavior of mixed ICs – including SystemC, System Verilog, & SPICE. But it may be tricky to compute how well they satisfy an arbitrary functional spec (Turing undecidable in the general case…). So there, again, it key to relate usable specs to things that can be efficiently computed.

    The other day I mentioned the project of trying to add new behavior to an existing prototype template and allowing an automated system to compute manufacturing schematic. I like to relate the idea to a constrained optimization problem that first looks for a feasible solution that satisfies the constraints & then attempts to further optimize around that solution while maintaining concordance to the given constraints. We can imagine doing that for many parts of a hierarchical system, but only if we know how to compose the constraints in a way that relates parts to the whole. Finding a feasible solution could involve any of these forms:

    a) Starting with a prototype & making some limited additions and/or subtractions.

    b) Starting with SoC simulator of required behavior + DAC where necessary.

    c) Building from some existing blocks by composition.

    All of those approaches might begin by referencing catalogs of examples, searching for a combination that fits the definition of feasible. In some cases, the feasibility question itself will require simulation to check that.

    • #80474

      josh

      My understanding is that Mathworks/Matlab has actively promoted some similar concept of staged development where the Simulink product is used as a runtime circuit simulation for prototyping that can later be swapped out for hardware. They have some set of examples. They go back & forth to Verilink & “untimed SystemC”. There is a 3rd Party Product called Catapult Synthesis that adds a better mapping.

  • #80790

    josh

    For combining and/or evaluating arbitrary combinations of components, it might turn out that upsampled digital simulation provides a lingua franca that can be used for analytical evaluation/design purposes.

  • #81744

    josh

    Referencing also the other thread on Nanotech EDA

    …Consider the Wireless Relay/Sentry as a proprietary white box which can hold some subset of many options in a particular set of physical forms that the product designer customizes.

    He may be interested in contributions to various security functions (what was moving while I was away?)

    He may be interested in contributions to various wireless networking functions, including IoT/Bluetooth,LAN,WAN,cloud, etc.

    He may be interested in sensing, neutralizing, or removing toxic comm or EMF signals from the environment.

    Lots of flexibility is good because the set of functions is vast, ever-changing, & there is a desire to fit conveniently into everyday product forms. The overall concept is taking design/control of the the EMF space in modern life for the benefit of the consumer/org & not Deep State.

    Like a white box, we want it to be ez to add new functionality in & optimize price. And we want to make it a good deal to set a lot of them into a given site for true causes.

    • #81757

      josh

      Incorporating various types of sensors – lidar, temp, humidity, etc.

      Another point about flex design – if a particular device needs an a good antennae or an RJ-45 or coax or AC power, etc then those needs restrict size & form. But that 1 device might be communicating with a large local network of nodes that don’t need those physical elements, so they can be smaller & more blended, still in a coordinated design.

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